Program Schedule

The 36th International Workshop on Languages and Compilers for Parallel Computing

October 11-13, 2023, Lexington, Kentucky, USA

The workshop schedule appears below. Registration is required for attendees, but is free and includes the banquet. The papers linked here are all to be considered preliminary versions for attendees to access during the conference; their URLs here might not be maintained in the long run and thus should NOT be cited.

Click here for parking information and maps. The space we will be using for the workshop is primarily the Hardymon Theater on the first floor of the Davis Marksbury Building. Professor Hank Dietz, the organizer for this year's LCPC, also has his office, research lab, and cluster computing machine room in this building. The research lab (room 108) and machine room (room 108A) are both just down the hall from the Hardymon Theater; the lab has plenty of space for attendees to do things ranging from temporarily storing luggage to having a quiet space for a Zoom meeting that they couldn't miss while attending LCPC.

The workshop technical content includes:

The tentative workshop schedule follows.


Wednesday, October 11, 2023

10:00-
Optionally visit UK Art Museum (1 block from Marksbury, takes about 1 hour)
12:00-12:50
Workshop check-in at Davis Marksbury Building
12:50-13:00
Workshop introductory remarks
13:00-14:00
Keynote: AB Siddique
14:00-15:30
Reviewed paper session: AI in Compilers
15:30-16:00
Break
16:00-17:00
Panel: AI in Programming & Compilers
Moderator: Dietz, Panelists: Siddique, Shivam, Sadayappan
17:00-17:30
Break
17:30
Board bus to Banquet, to be held at Merrick Inn; LCPC will provide food, there will be a cash bar for drinks


Thursday, October 12, 2023

08:30-09:00
Workshop check-in at Davis Marksbury Building
09:00-10:00
Keynote: Hironori Kasahara
OSCAR Codesigned Compiler and Multicore Architecture
Abstract: This talk starts research on the Codesign of OSCAR Multiprocessor to support compiler parallelization using fine-grain to coarse-grain hierarchical parallelism, static and dynamic scheduling, overlapping data transfer using DMA, and variable group barrier synchronization that has started since 1984. The architecture and compiler have evolved, chasing the progress of both technologies. Currently, codesign allows us high-performance execution of various scientific, medical, AI-robot, automotive, FA, multi-media applications, and so on, using multigrain parallel processing with last-level cache, distributed, and local memories for a total program. In addition, the codesign has realized low-power green computing with no-cooling or solar-powered execution for homogeneous and heterogeneous multicores.
10:00-11:30
Reviewed paper session: Data Layout and Movement
11:30-13:00
Lunch, on your own
13:00-14:00
Panel: Evolution of Parallel Architecture Targets
Moderator: Dietz, Panelists: Kasahara, Sadeghi, Thakkar
14:00-15:30
Reviewed paper session: Target Architecture Details Matter
15:30-16:00
Break
16:00-17:00
Invited paper session: Programming Languages
17:00-18:00
Panel: Parallel Programming and Languages
Moderator: Dietz, Panelists: Gressman, Marron, Eigenmann
18:00-18:30
Break
18:30
Walk to Kentucky Native Cafe; LCPC will provide apetizers, you would pay for your own food and drink


Friday, October 13, 2023

08:30-09:00
Workshop check-in at Davis Marksbury Building
09:00-11:00
Reviewed paper session: Application Support and Portable Performance
11:00-11:30
Workshop closing remarks
11:30-
At your option, there are many things to do, including:


LCPC2023 Languages and Compilers for Parallel Computing